Neosyn Fpga Mcp

io.neosynv1.1.2Updated Sep 23, 2026

AI-agent MCP server for FPGA design: compile, validate & generate Verilog from C⏚ HDL.

VerifiedSTDIODesktop onlyMedia & DesignCloud & InfrastructureSecurity & Monitoring

Installation

In SourceWeft

  1. Open Neosyn Fpga Mcp in the dashboard and add it to a workspace.
  2. Enable the server for the chats that should use its tools.

Desktop only via STDIO. STDIO servers start a local process, so they need the SourceWeft desktop host.

Other MCP clients

Follow the launch instructions in the repository.

Tools

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Version history

1
  1. v1.1.2LatestSep 20, 2026