Domain Embedded

by actionbook5c40d3ad7851No license1.5K starsListed Oct 8, 2026Updated Oct 8, 2026Repository updated 6 weeks ago

Use when developing embedded/no_std Rust. Keywords: embedded, no_std, microcontroller, MCU, ARM, RISC-V, bare metal, firmware, HAL, PAC, RTIC, embassy, interrupt, DMA, peripheral, GPIO, SPI, I2C, UART, embedded-hal, cortex-m, esp32, stm32, nrf, 嵌入式, 单片机, 固件, 裸机

Instructions onlySoftware Development
AI-generated overview

Guides Rust embedded and no_std development, covering constraints, frameworks, crates and hardware patterns.

What it does
This skill supplies domain guidance for writing embedded and no_std Rust, such as firmware for microcontrollers. It lays out constraints like no heap allocation, interrupt safety and peripheral ownership, and maps them to Rust patterns including heapless collections, critical sections and HAL singletons. It also compares frameworks (RTIC, Embassy, bare metal), lists key crates and shows a static peripheral code pattern with common mistakes. It produces advisory reference material rather than files or scripts.
When to use it
Use it when developing embedded or bare-metal Rust, including no_std firmware for MCUs such as ARM, RISC-V, STM32, ESP32 or nRF. It is relevant when working with HALs, PACs, interrupts, DMA or peripherals, or when choosing between RTIC, Embassy and bare-metal approaches.
Requirements
No scripts or tooling are required; it is instructions only. It assumes a Rust embedded project context, and its injected context reads .cargo/config.toml when present.

Project Context (Auto-Injected)

Target configuration: !cat .cargo/config.toml 2>/dev/null || echo "No .cargo/config.toml found"


Embedded Domain

Layer 3: Domain Constraints

Domain Constraints → Design Implications

Domain RuleDesign ConstraintRust Implication
No heapStack allocationheapless, no Box/Vec
No stdCore only#![no_std]
Real-timePredictable timingNo dynamic alloc
Resource limitedMinimal memoryStatic buffers
Hardware safetySafe peripheral accessHAL + ownership
Interrupt safeNo blocking in ISRAtomic, critical sections

Critical Constraints

No Dynamic Allocation

RULE: Cannot use heap (no allocator)WHY: Deterministic memory, no OOMRUST: heapless::Vec<T, N>, arrays

Interrupt Safety

RULE: Shared state must be interrupt-safeWHY: ISR can preempt at any timeRUST: Mutex<RefCell<T>> + critical section

Hardware Ownership

RULE: Peripherals must have clear ownershipWHY: Prevent conflicting accessRUST: HAL takes ownership, singletons

Trace Down ↓

From constraints to design (Layer 2):

"Need no_std compatible data structures"    ↓ m02-resource: heapless collections    ↓ Static sizing: heapless::Vec<T, N>
"Need interrupt-safe state"    ↓ m03-mutability: Mutex<RefCell<Option<T>>>    ↓ m07-concurrency: Critical sections
"Need peripheral ownership"    ↓ m01-ownership: Singleton pattern    ↓ m12-lifecycle: RAII for hardware

Layer Stack

LayerExamplesPurpose
PACstm32f4, esp32c3Register access
HALstm32f4xx-halHardware abstraction
FrameworkRTIC, EmbassyConcurrency
Traitsembedded-halPortable drivers

Framework Comparison

FrameworkStyleBest For
RTICPriority-basedInterrupt-driven apps
EmbassyAsyncComplex state machines
Bare metalManualSimple apps

Key Crates

PurposeCrate
Runtime (ARM)cortex-m-rt
Panic handlerpanic-halt, panic-probe
Collectionsheapless
HAL traitsembedded-hal
Loggingdefmt
Flash/debugprobe-run

Design Patterns

PatternPurposeImplementation
no_std setupBare metal#![no_std] + #![no_main]
Entry pointStartup#[entry] or embassy
Static stateISR accessMutex<RefCell<Option<T>>>
Fixed buffersNo heapheapless::Vec<T, N>

Code Pattern: Static Peripheral

rust
#![no_std]#![no_main]
use cortex_m::interrupt::{self, Mutex};use core::cell::RefCell;
static LED: Mutex<RefCell<Option<Led>>> = Mutex::new(RefCell::new(None));
#[entry]fn main() -> ! {    let dp = pac::Peripherals::take().unwrap();    let led = Led::new(dp.GPIOA);
    interrupt::free(|cs| {        LED.borrow(cs).replace(Some(led));    });
    loop {        interrupt::free(|cs| {            if let Some(led) = LED.borrow(cs).borrow_mut().as_mut() {                led.toggle();            }        });    }}

Common Mistakes

MistakeDomain ViolationFix
Using VecHeap allocationheapless::Vec
No critical sectionRace with ISRMutex + interrupt::free
Blocking in ISRMissed interruptsDefer to main loop
Unsafe peripheralHardware conflictHAL ownership

Trace to Layer 1

ConstraintLayer 2 PatternLayer 1 Implementation
No heapStatic collectionsheapless::Vec<T, N>
ISR safetyCritical sectionsMutex<RefCell<T>>
Hardware ownershipSingletontake().unwrap()
no_stdCore-only#![no_std], #![no_main]

Related Skills

WhenSee
Static memorym02-resource
Interior mutabilitym03-mutability
Interrupt patternsm07-concurrency
Unsafe for hardwareunsafe-checker

Source and attribution

Source:actionbook/rust-skillsinskills/domain-embeddedat commit5c40d3a

License: No license

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