Make

mohitmishra786/low-level-dev-skills/skills/build-systems/make

作者 mohitmishra786bdc58472fa9f無授權條款253 個星標收錄於 2026年10月9日更新於 2026年10月9日儲存庫3 個月前更新

GNU Make skill for C/C++ build systems. Use when writing or debugging Makefiles, understanding pattern rules and automatic dependency generation, managing CFLAGS/LDFLAGS, converting ad-hoc compile commands into maintainable Makefiles, or diagnosing incremental build issues. Activates on queries about Makefiles, make targets, pattern rules, phony targets, dependency tracking, recursive make, or make errors.

僅含說明Software Development

AI 產生的概覽

指導撰寫與除錯用於 C/C++ 建置的 GNU Makefile，涵蓋模式規則、相依性追蹤與常見錯誤。

功能: 提供適用於 C 與 C++ 專案的慣用 GNU Makefile 模式，包括最小建置檔、模式規則、使用 -MMD -MP 的自動相依性產生，以及除錯/發行組態。它說明自動變數、平行與詳細輸出建置、安裝目標，以及多目錄專案配置。它也列出常見 make 錯誤及其原因與修正方式，並指向隨附的速查表以查閱變數與函式參考。
適用情境: 在為 C 或 C++ 專案撰寫或除錯 Makefile、加入標頭檔相依性追蹤、將臨時編譯指令轉換為可維護的 Makefile，或診斷增量建置問題與 make 錯誤時使用。
執行需求: 除了代理本身之外不需要任何腳本或工具，僅為說明性內容。它引用隨附的速查表檔案，並假設使用者熟悉 GNU Make、gcc 等 C/C++ 編譯器，以及用來執行 make 指令的 shell。

GNU Make

Purpose

Guide agents through idiomatic Makefile patterns for C/C++ projects: phony targets, pattern rules, automatic dependency generation, and common build idioms.

Triggers

"How do I write a Makefile for my C project?"
"My Makefile rebuilds everything every time"
"How do I add dependency tracking to Make?"
"What does $@, $<, $^ mean?"
"I'm getting 'make: Nothing to be done for all'"
"How do I convert my shell compile script to a Makefile?"

Workflow

1. Minimal correct Makefile for C

makefile

CC      := gccCFLAGS  := -std=c11 -Wall -Wextra -g -O2LDFLAGS :=LDLIBS  :=
SRCS    := $(wildcard src/*.c)OBJS    := $(SRCS:src/%.c=build/%.o)TARGET  := build/prog
.PHONY: all clean
all: $(TARGET)
$(TARGET): $(OBJS)	$(CC) $(LDFLAGS) -o $@ $^ $(LDLIBS)
build/%.o: src/%.c | build	$(CC) $(CFLAGS) -c -o $@ $<
build:	mkdir -p build
clean:	rm -rf build

CC      := gccCFLAGS  := -std=c11 -Wall -Wextra -g -O2LDFLAGS :=LDLIBS  :=
SRCS    := $(wildcard src/*.c)OBJS    := $(SRCS:src/%.c=build/%.o)TARGET  := build/prog
.PHONY: all clean
all: $(TARGET)
$(TARGET): $(OBJS)	$(CC) $(LDFLAGS) -o $@ $^ $(LDLIBS)
build/%.o: src/%.c | build	$(CC) $(CFLAGS) -c -o $@ $<
build:	mkdir -p build
clean:	rm -rf build

Automatic variables:

$@ — target name
$< — first prerequisite
$^ — all prerequisites (deduplicated)
$* — stem (the % part in a pattern rule)
$(@D) — directory part of $@

2. Automatic dependency generation

Without this, changing a header doesn't trigger a rebuild of .c files that include it.

makefile

CC      := gccCFLAGS  := -std=c11 -Wall -Wextra -g -O2DEPFLAGS = -MMD -MP            # -MMD: generate .d file; -MP: phony targets for headers
SRCS    := $(wildcard src/*.c)OBJS    := $(SRCS:src/%.c=build/%.o)DEPS    := $(OBJS:.o=.d)TARGET  := build/prog
.PHONY: all clean
all: $(TARGET)
$(TARGET): $(OBJS)	$(CC) $(LDFLAGS) -o $@ $^ $(LDLIBS)
build/%.o: src/%.c | build	$(CC) $(CFLAGS) $(DEPFLAGS) -MF $(@:.o=.d) -c -o $@ $<
-include $(DEPS)    # '-' ignores errors on first build (no .d files yet)
build:	mkdir -p build
clean:	rm -rf build

CC      := gccCFLAGS  := -std=c11 -Wall -Wextra -g -O2DEPFLAGS = -MMD -MP            # -MMD: generate .d file; -MP: phony targets for headers
SRCS    := $(wildcard src/*.c)OBJS    := $(SRCS:src/%.c=build/%.o)DEPS    := $(OBJS:.o=.d)TARGET  := build/prog
.PHONY: all clean
all: $(TARGET)
$(TARGET): $(OBJS)	$(CC) $(LDFLAGS) -o $@ $^ $(LDLIBS)
build/%.o: src/%.c | build	$(CC) $(CFLAGS) $(DEPFLAGS) -MF $(@:.o=.d) -c -o $@ $<
-include $(DEPS)    # '-' ignores errors on first build (no .d files yet)
build:	mkdir -p build
clean:	rm -rf build

3. Pattern rules cheatsheet

makefile

# Compile C%.o: %.c	$(CC) $(CFLAGS) -c -o $@ $<
# Compile C++%.o: %.cpp	$(CXX) $(CXXFLAGS) -c -o $@ $<
# Generate assembly%.s: %.c	$(CC) $(CFLAGS) -S -o $@ $<
# Run a tool on each filebuild/%.processed: src/%.raw | build	mytool $< > $@

# Compile C%.o: %.c	$(CC) $(CFLAGS) -c -o $@ $<
# Compile C++%.o: %.cpp	$(CXX) $(CXXFLAGS) -c -o $@ $<
# Generate assembly%.s: %.c	$(CC) $(CFLAGS) -S -o $@ $<
# Run a tool on each filebuild/%.processed: src/%.raw | build	mytool $< > $@

4. Common Make patterns

Debug and release builds

makefile

BUILD ?= release
ifeq ($(BUILD),debug)  CFLAGS += -g -Og -DDEBUGelse  CFLAGS += -O2 -DNDEBUGendif

BUILD ?= release
ifeq ($(BUILD),debug)  CFLAGS += -g -Og -DDEBUGelse  CFLAGS += -O2 -DNDEBUGendif

Usage: make BUILD=debug

Parallel builds

Add -Otarget (or -O) for ordered output: make -j$(nproc) -O

Verbose output

makefile

# In Makefile: suppress with @build/%.o: src/%.c | build	@echo "  CC  $<"	@$(CC) $(CFLAGS) -c -o $@ $<

# In Makefile: suppress with @build/%.o: src/%.c | build	@echo "  CC  $<"	@$(CC) $(CFLAGS) -c -o $@ $<

Override silence: make V=1 if you guard with $(V):

Installing

makefile

PREFIX ?= /usr/local
install: $(TARGET)	install -d $(DESTDIR)$(PREFIX)/bin	install -m 0755 $(TARGET) $(DESTDIR)$(PREFIX)/bin/

PREFIX ?= /usr/local
install: $(TARGET)	install -d $(DESTDIR)$(PREFIX)/bin	install -m 0755 $(TARGET) $(DESTDIR)$(PREFIX)/bin/

5. Multi-directory projects

For medium projects, avoid recursive make (fragile, slow). Use a flat Makefile that includes sub-makefiles:

makefile

# lib/module.mkLIB_SRCS := $(wildcard lib/*.c)LIB_OBJS := $(LIB_SRCS:lib/%.c=build/lib_%.o)OBJS      += $(LIB_OBJS)
build/lib_%.o: lib/%.c	$(CC) $(CFLAGS) -c -o $@ $<

# lib/module.mkLIB_SRCS := $(wildcard lib/*.c)LIB_OBJS := $(LIB_SRCS:lib/%.c=build/lib_%.o)OBJS      += $(LIB_OBJS)
build/lib_%.o: lib/%.c	$(CC) $(CFLAGS) -c -o $@ $<

6. Common errors

Error	Cause	Fix
`No rule to make target 'foo.o'`	Missing source or rule	Check source path and pattern rule
`Nothing to be done for 'all'`	Targets up to date	Touch a source file or run `make clean`
`Circular dependency dropped`	Target depends on itself	Check dependency chain
`missing separator`	Tab vs spaces	Recipes must use a tab, not spaces
`*** multiple target patterns`	Pattern rule syntax error	Check `%` placement
Rebuilds everything every time	Timestamps wrong, or PHONY missing	Check `date`; ensure `all` is `.PHONY`
Header change not detected	No dep tracking	Add `-MMD -MP` and `-include $(DEPS)`

For a full variable and function reference, see references/cheatsheet.md [blocked].

Related skills

Use skills/build-systems/cmake for CMake-based projects
Use skills/build-systems/ninja for Ninja as a make backend
Use skills/compilers/gcc for CFLAGS details

來源與署名

來源：mohitmishra786/low-level-dev-skills位於skills/build-systems/make提交bdc5847

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檢舉或申請下架

Make

GNU Make

Purpose

Triggers

Workflow

1. Minimal correct Makefile for C

2. Automatic dependency generation

3. Pattern rules cheatsheet

4. Common Make patterns

Debug and release builds

Parallel builds

Verbose output

Installing

5. Multi-directory projects

6. Common errors

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